• Memory controller implements error correction algorithm in hardware

  • Algorithm adds redundancy by modifying (normally just adding to) raw RAM contents

  • Extra memory chips are used to store the expanded data - a "512 MiB ECC DIMM" actually contains 576 MiB of storage.

  • Algorithm which is implemented by most contemporary "ECC-Capable" memory controllers allows for correction of a single bit error per 64bit word, and detection of (most) more serious errors: "SECDED" - Single (bit) Error Correct (with) Double (bit) Error Detect.